The present disclosure relates to semiconductor devices, and methods of manufacturing such semiconductor devices, and more particularly to semiconductor devices having a buried interconnect structure and methods of manufacturing such semiconductor devices.
In recent years, with miniaturization of semiconductor integrated circuit devices, a current flowing through interconnects in the devices increases, and as a result, failure due to electromigration has become a serious problem.
In order to prevent electromigration, it is necessary to improve adhesion between interconnects and films in the vicinity of the interconnects. Japanese Patent Publication No. H10-189604 and the like disclose a method of improving adhesion between interconnects and films in the vicinity of the interconnects by exposing a surface of an interconnect made of copper (Cu) to a silicon compound, such as silane (SiH4), etc., to form a copper silicide (CuSix) layer.
FIGS. 11A-11D and FIGS. 12A-12C show a method of manufacturing a conventional semiconductor device for improving adhesion between interconnects and films in the vicinity of the interconnects in the order of the steps performed.
First, as shown in FIG. 11A, a first insulating film 102 is formed on a semiconductor substrate 101, and a first interconnect groove 103 is formed in the upper part of the first insulating film 102 by use of a lithography method and a dry etching method.
Next, as shown in FIG. 11B, a first barrier film 104 and a first copper (Cu) film 105 are sequentially formed on the first insulating film 102, and sidewalls and the bottom surface of the first interconnect groove 103, thereby filling the first interconnect groove 103. Then, the first barrier film 104 and the first Cu film 105 formed outside the first interconnect groove 103 are removed by a chemical mechanical polishing (CMP) method to form a lower interconnect 106.
Next, as shown in FIG. 11C, the semiconductor substrate 101 is heated, and is exposed to a silicon compound, such as silane (SiH4), etc., to form a copper silicide (CuSix) layer 107 serving as a reaction layer in the upper part of the first Cu film 105.
Next, as shown in FIG. 11D, a portion located on the semiconductor substrate 101 is exposed to plasma of a nitrogen compound, such as ammonia (NH3), etc., to nitride the upper part of the CuSix layer 107, thereby forming a silicon nitride (SiN) layer 108.
Next, as shown in FIG. 12A, a second insulating film 109 is formed so as to cover the first insulating film 102, the first barrier film 104, and the SiN film 108, and a via hole 110 through which the lower interconnect 106 is exposed is formed in the second insulating film 109 by a lithography method and a dry etching method.
Next, as shown in FIG. 12B, a second interconnect groove 111 is formed in the upper part of the second insulating film 109. Part of the second interconnect groove 111 includes the via hole 110 through which the lower interconnect 106 is exposed.
Next, as shown in FIG. 12C, a second barrier film 112 and a second Cu film 113 are sequentially formed on the second insulating film 109, sidewalls and the bottom surface of the via hole 110, and sidewalls and the bottom surface of the second interconnect groove 111, thereby filling the via hole 110 and the second interconnect groove 111. Then, the second barrier film 112 and the second Cu film 113 formed outside the via hole 110 and the second interconnect groove 111 are removed by the CMP method to form an upper interconnect 114, thereby achieving a semiconductor device including two layers of interconnects. Then, by repeating the steps shown in FIGS. 11C-12C, a semiconductor device including a desired number of layers of interconnects can be manufactured.
With such steps, a semiconductor device in which the CuSix layer 107 is interposed between the first Cu film 105 and the SiN film 108 can be obtained, and the CuSix layer 107 improves adhesion between the first Cu film 105 and the SiN film 108.